


#ifndef TRUE
	#define TRUE		(1)
#endif

#ifndef FALSE
	#define FALSE		(0)
#endif

#ifndef LOW8
	#define LOW8(val)	((unsigned char)(val & 0xff))
#endif

#ifndef HIGH8
	#define HIGH8(val)	((unsigned char)((val & 0xff00) >> 8))
#endif

#ifndef NUM_ENTRIES
	#define NUM_ENTRIES(x)	(sizeof(x)/sizeof((x)[0]))
#endif

#ifndef __KERNEL__
	#define __KERNEL__
#endif

#define MAX_SERIALNUMBER_LEN 	12

/* The following table is used to map the USBx port number to 
 * the device serial number (or physical USB path), */

#define MAX_MOSPORTS	2
#define MAX_NAME_LEN	64

#define RAID_REG1 	0x30
#define RAID_REG2 	0x31

#define ZLP_REG1  	0x3A      //Zero_Flag_Reg1    58
#define ZLP_REG2  	0x3B      //Zero_Flag_Reg2    59
#define ZLP_REG3  	0x3C      //Zero_Flag_Reg3    60
#define ZLP_REG4  	0x3D      //Zero_Flag_Reg4    61
#define ZLP_REG5  	0x3E      //Zero_Flag_Reg5    62

#define THRESHOLD_VAL_SP1_1     0x3F
#define THRESHOLD_VAL_SP1_2     0x40
#define THRESHOLD_VAL_SP2_1     0x41
#define THRESHOLD_VAL_SP2_2     0x42

#define THRESHOLD_VAL_SP3_1     0x43
#define THRESHOLD_VAL_SP3_2     0x44
#define THRESHOLD_VAL_SP4_1     0x45
#define THRESHOLD_VAL_SP4_2     0x46


/* For higher baud Rates use TIOCEXBAUD */
#define TIOCEXBAUD	0x5462  

#define BAUD_1152	0	/* 115200bps  * 1	*/
#define BAUD_2304	1	/* 230400bps  * 2	*/
#define BAUD_4032	2	/* 403200bps  * 3.5	*/
#define BAUD_4608	3	/* 460800bps  * 4	*/
#define BAUD_8064	4	/* 806400bps  * 7	*/
#define BAUD_9216	5	/* 921600bps  * 8	*/

#define CHASE_TIMEOUT		(5*HZ)		/* 5 seconds */
#define OPEN_TIMEOUT		(5*HZ)		/* 5 seconds */
#define COMMAND_TIMEOUT		(5*HZ)		/* 5 seconds */

#ifndef SERIAL_MAGIC
	#define SERIAL_MAGIC	0x6702
#endif

#define PORT_MAGIC		0x7301



/* vendor id and device id defines */

#define USB_VENDOR_ID_MOSCHIP		0x9710
#define MOSCHIP_DEVICE_ID_7840		0x7840
#define MOSCHIP_DEVICE_ID_7820		0x7820

/* Product information read from the Moschip. Provided for later upgrade */

/* Interrupt Rotinue Defines	*/
	
#define SERIAL_IIR_RLS      0x06
#define SERIAL_IIR_RDA      0x04
#define SERIAL_IIR_CTI      0x0c
#define SERIAL_IIR_THR      0x02
#define SERIAL_IIR_MS       0x00

/*
 *  Emulation of the bit mask on the LINE STATUS REGISTER.
 */
#define SERIAL_LSR_DR       0x0001
#define SERIAL_LSR_OE       0x0002
#define SERIAL_LSR_PE       0x0004
#define SERIAL_LSR_FE       0x0008
#define SERIAL_LSR_BI       0x0010
#define SERIAL_LSR_THRE     0x0020
#define SERIAL_LSR_TEMT     0x0040
#define SERIAL_LSR_FIFOERR  0x0080

//MSR bit defines(place holders)
#define MOS_MSR_CTS         0x01
#define MOS_MSR_DSR         0x02 
#define MOS_MSR_RI          0x04
#define MOS_MSR_CD          0x08
#define MOS_MSR_DELTA_CTS   0x10
#define MOS_MSR_DELTA_DSR   0x20 
#define MOS_MSR_DELTA_RI    0x40
#define MOS_MSR_DELTA_CD    0x80

// Serial Port register Address
#define RECEIVE_BUFFER_REGISTER    ((0x00))
#define TRANSMIT_HOLDING_REGISTER  ((0x00))
#define INTERRUPT_ENABLE_REGISTER  ((0x01))
#define INTERRUPT_IDENT_REGISTER   ((0x02))
#define FIFO_CONTROL_REGISTER      ((0x02))
#define LINE_CONTROL_REGISTER      ((0x03))
#define MODEM_CONTROL_REGISTER     ((0x04))
#define LINE_STATUS_REGISTER       ((0x05))
#define MODEM_STATUS_REGISTER      ((0x06))
#define SCRATCH_PAD_REGISTER       ((0x07))
#define DIVISOR_LATCH_LSB          ((0x00))
#define DIVISOR_LATCH_MSB          ((0x01))

#define SP_REGISTER_BASE           ((0x08))
#define CONTROL_REGISTER_BASE      ((0x09))
#define DCR_REGISTER_BASE          ((0x16))

#define SP1_REGISTER               ((0x00))
#define CONTROL1_REGISTER          ((0x01))
#define CLK_MULTI_REGISTER         ((0x02))
#define CLK_START_VALUE_REGISTER   ((0x03))
#define DCR1_REGISTER              ((0x04))
#define GPIO_REGISTER              ((0x07))

#define CLOCK_SELECT_REG1          ((0x13))
#define CLOCK_SELECT_REG2          ((0x14))

#define SERIAL_LCR_DLAB       	   ((0x0080))

/*
 * URB POOL related defines
 */
#define NUM_URBS                        16     /* URB Count */
#define URB_TRANSFER_BUFFER_SIZE        32     /* URB Size  */



 #define LCR_BITS_MASK           0x03    // Mask for bits/char field
 #define LCR_PAR_MASK            0x38    // Mask for parity field
#define LCR_STOP_MASK           0x04    // Mask for stop bits field
#define MCR_DTR                 0x01    // Assert DTR
 #define MCR_RTS                 0x02    // Assert RTS
 #define MCR_OUT1                0x04    // Loopback only: Sets state of RI
 #define MCR_MASTER_IE           0x08    // Enable interrupt outputs
 #define MCR_LOOPBACK            0x10    // Set internal (digital) loopback mode
 #define MCR_XON_ANY             0x20    // Enable any char to exit XOFF mode
 #define MCR_IR_ENABLE           0x40    // Enable IrDA functions
#define MCR_BRG_DIV_4           0x80    // Divide baud rate clk by /4 instead of /1
#define LCR_BITS_5              0x00    // 5 bits/char

 #define LCR_BITS_6              0x01    // 6 bits/char
 #define LCR_BITS_7              0x02    // 7 bits/char
 #define LCR_BITS_8              0x03    // 8 bits/char
 #define LCR_BITS_MASK           0x03    // Mask for bits/char field
 
 #define LCR_STOP_1              0x00    // 1 stop bit
 #define LCR_STOP_1_5            0x04    // 1.5 stop bits (if 5   bits/char)
 #define LCR_STOP_2              0x04    // 2 stop bits   (if 6-8 bits/char)
 #define LCR_STOP_MASK           0x04    // Mask for stop bits field
 
 #define LCR_PAR_NONE            0x00    // No parity
 #define LCR_PAR_ODD             0x08    // Odd parity
 #define LCR_PAR_EVEN            0x18    // Even parity
